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NXP Semiconductors /MIMXRT1052 /CAN1 /IMASK1

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Interpret as IMASK1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BUFLM_0)BUFLM

BUFLM=BUFLM_0

Description

Interrupt Masks 1 Register

Fields

BUFLM

Each bit enables or disables the respective FLEXCAN Message Buffer (MB0 to MB31) Interrupt

0 (BUFLM_0): The corresponding buffer Interrupt is disabled

1 (BUFLM_1): The corresponding buffer Interrupt is enabled

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data